In the manufacture of semiconductor integrated circuits dry etch tools are often configured for multiple etch processes for better tool utilization. The interaction between processed and residual effects can change process outputs and cause unique defects and problems. It is often the case that the information that is available in prior art books and methods is not helpful in solving some of the unique defects and problems that appear. When confronted with a previously unknown defect or problem, manufacturers of integrated circuits must resort to extensive investigations and testing in order to determine a solution to the problem.
One particular problem occurs when a residual contaminant from an upstream dry etch process interacts with incoming material in a subsequent dry etch process. A complex interaction between the contaminant and the incoming material produces localized defects in a downstream interlevel dielectric (ILD) layer that causes the deposited dielectric to have a number of voids throughout in the manner of a sponge. For this reason the defective dielectric is referred to as having a “spongy” appearance.
Prior art technology does not provide an understanding of a mechanism that causes the formation of a defective spongy dielectric. Therefore, prior art technology is not able to devise an effective method for preventing the formation of a defective spongy dielectric.
Therefore, there is a need in the art for an improved system and method for monitoring, controlling and eliminating the creation of a defective spongy dielectric during the manufacture of semiconductor integrated circuit devices.